The present invention is related to electronic circuits for signal processing, and more specifically to an ADC peak detector circuit.
Generally, signal processing used for peak detection involves the use of a digital signal processor as well as other circuitry. Typically, the following method is used to perform peak detection. First, an analog signal is filtered with an anti-alias filter. The analog signal is then converted to a digital signal by means of an ADC (analog to digital converter). Next, a DSP (digital signal processor) is used perform the peak detection function on the digital signal. The digital signal is then converted back to an analog signal by means of a DAC (digital to analog converter). Finally, the signal is filtered with a low pass filter.
The peak detection signal system described above requires many complex components taking up resources on the circuit. For example, extra power is needed to provide power to the DSP (digital signal processor), ADC, and other components. Additionally, the available die area on the chip is reduced by each extra component placed on it. For example, the DSP takes up valuable resources on the circuit. Even simple signal processing functions may require many extra components taking up valuable resources.
The present invention is directed at peak detection without the use of a digital signal processor and ADC. The invention is also directed at implementing peak detection with minimal complexity and a minimal die area.
According to one aspect of the invention, no A/D converter circuitry is needed. Instead, a reference signal, which according to one embodiment of the invention relates to a DAC output signal, is used as a starting point and is adjusted to produce the desired peak detection signal processing function. Comparisons are made between the reference signal and an input signal. The reference signal is adjusted to obtain the peak detection function.
According to another aspect of the invention, an algorithm implements a signal processing function based on the history of the last n comparisons between the reference signal and the incoming signal, where n is a pre-determined number greater than zero. The algorithm may also generate feedback that modifies the reference signal.
According to another aspect of the invention, an apparatus for signal processing comprises a controlled reference circuit that produces a reference signal corresponding to a code. The apparatus also comprises a decision level processing circuit that is arranged to make a comparison between the reference signal and an input signal. The decision level processing circuit is configured to produce a desired signal processing function in response to the comparison.
According to another aspect of the invention, a method for performing peak detection for an incoming signal is provided. The method includes making a comparison between a reference code relating to a code and another signal, applying a peak detection signal processing function to the signal, and producing an output signal in response to the comparison and the peak detection signal processing function.
According to yet another aspect of the invention, an apparatus for a peak detection circuit comprises a means for signal processing without the use of a DSP and ADC. The apparatus produces a reference signal in response to a DAC signal and makes a comparison between the reference signal and an analog signal. A means for peak detection signal processing is applied and a signal relating to the peak of the signal is produced in response to the comparison and the signal processing function.